OpenMP: SIMD translation

A handwritten translation of a SIMD loop (in the context of OpenMP) to PVL.

General Information

  • Backend: Silicon
  • Language: PVL
  • Features: Iteration contracts, Arrays, Loop parallelisations, Quantified permissions, Loop vectorisation
  • Path to Example File: openmp/addvec2.pvl
  • Should Verify: Yes
  • Date: 2017-06-20
  • Lines of Code: 26 (comments not included)
  • Lines of Specification: 14 (53.8% of total)
  • Computation Time: 33.9 seconds